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# File 'lib/udb-gen/generators/inst_table/table_builder.rb', line 61
def generate
lines = []
@arch.instructions.each do |inst|
enc_32 = get_encoding(inst, 32)
enc_64 = get_encoding(inst, 64)
if enc_32.empty? && enc_64.empty?
puts "instruction #{inst.name} not supported by 32-bit or 64-bit"
next
end
if (enc_32 == enc_64)
lines << ([inst.name, "common"] + enc_64).join(" ")
next
end
unless enc_32.empty? || enc_64.empty?
lines << ([inst.name, "common,32"] + enc_32).join(" ")
lines << ([inst.name, "common,64"] + enc_64).join(" ")
next
end
if enc_32.any?
lines << ([inst.name, "32"] + enc_32).join(" ")
next
end
if enc_64.any?
lines << ([inst.name, "64"] + enc_64).join(" ")
next
end
end
command = "./bin/generate inst-table"
command += " -o #{@file_name}" unless @file_name.nil?
= <<EOM
# SPDX-License-Identifier: BSD-3-Clause-Clear
#
# GENERATED WITH https://github.com/riscv-software-src/riscv-unified-db
# "#{command}"
#
# Each line of the instruction table should have the following format:
# NAME BASE FIXED_BITS [VARIABLE_LIST]
# NAME instruction name
# BASE instruction base size (common[,(32|64)])
# "common" means the instruction is valid on both architecture sizes
# "32" or "64" means the instruction is valid on that size
# if the instruction is valid on both architectures but has unique
# encodings, use a 32-bit entry "common,32" and 64-bit entry
# FIXED_BITS bitfields of the fixed bits of an instruction concatenated with '|'
# continuous grouping of fixed bits are in the form of 'bits<offset'
# VARIABLE_LIST a variable sized list of all variables in the instruction definition
# in the form of name[~][<num][!num...]=(high[-low])|...
# symbols after the name represent different modifiers:
# ~ sign extension, can only appear once
# < left shift by 'num' amount on extraction, can only appear once
# ! mark 'num' as an invalid input for this variable
EOM
+ lines.join("\n") + "\n"
end
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