Module: Badline::InstructionSet::Bitwise
- Included in:
- Badline::InstructionSet
- Defined in:
- lib/badline/instruction_set/bitwise.rb
Instance Method Summary collapse
-
#and(_addr, value) ⇒ Object
Performs bitwise AND on accumulator with memory.
-
#asl(addr, value) ⇒ Object
Arithmetic shift left.
-
#bit(_addr, value) ⇒ Object
Tests bits in memory with accumulator.
-
#eor(_addr, value) ⇒ Object
Performs bitwise XOR on accumulator with memory.
-
#lsr(addr, value) ⇒ Object
Logical shift right.
-
#ora(_addr, value) ⇒ Object
Performs bitwise OR on accumulator with memory.
-
#rol(addr, value) ⇒ Object
Rotate left through carry.
-
#ror(addr, value) ⇒ Object
Rotate right through carry.
Instance Method Details
#and(_addr, value) ⇒ Object
Performs bitwise AND on accumulator with memory.
Opcodes:
$21 - indirect_x - 6 cycles
$25 - zeropage - 3 cycles
$29 - immediate - 2 cycles
$2D - absolute - 4 cycles
$31 - indirect_y - 5+ cycles
$35 - zeropage_x - 4 cycles
$39 - absolute_y - 4+ cycles
$3D - absolute_x - 4+ cycles
17 18 19 20 |
# File 'lib/badline/instruction_set/bitwise.rb', line 17 def and(_addr, value) @a &= resolve(value) update_number_flags(@a) end |
#asl(addr, value) ⇒ Object
Arithmetic shift left. Shifts bits left by one position.
Opcodes:
$06 - zeropage - 5 cycles
$0A - accumulator- 2 cycles
$0E - absolute - 6 cycles
$16 - zeropage_x - 6 cycles
$1E - absolute_x - 7 cycles
30 31 32 33 34 35 36 |
# File 'lib/badline/instruction_set/bitwise.rb', line 30 def asl(addr, value) v = resolve(value) result = (v << 1) & 0xff status.carry = v[7] write_modified(addr, v, result) update_number_flags(result) end |
#bit(_addr, value) ⇒ Object
Tests bits in memory with accumulator.
Opcodes:
$24 - zeropage - 3 cycles
$2C - absolute - 4 cycles
43 44 45 46 47 48 |
# File 'lib/badline/instruction_set/bitwise.rb', line 43 def bit(_addr, value) v = resolve(value) status.value = ((status.value & 0b00111111) + (v & 0b11000000)).to_i status.zero = (a & v).nobits?(0xff) end |
#eor(_addr, value) ⇒ Object
Performs bitwise XOR on accumulator with memory.
Opcodes:
$41 - indirect_x - 6 cycles
$45 - zeropage - 3 cycles
$49 - immediate - 2 cycles
$4D - absolute - 4 cycles
$51 - indirect_y - 5+ cycles
$55 - zeropage_x - 4 cycles
$59 - absolute_y - 4+ cycles
$5D - absolute_x - 4+ cycles
61 62 63 64 |
# File 'lib/badline/instruction_set/bitwise.rb', line 61 def eor(_addr, value) @a = (@a ^ resolve(value)) & 0xff update_number_flags(@a) end |
#lsr(addr, value) ⇒ Object
Logical shift right. Shifts bits right by one position.
Opcodes:
$46 - zeropage - 5 cycles
$4A - accumulator- 2 cycles
$4E - absolute - 6 cycles
$56 - zeropage_x - 6 cycles
$5E - absolute_x - 7 cycles
74 75 76 77 78 79 80 |
# File 'lib/badline/instruction_set/bitwise.rb', line 74 def lsr(addr, value) v = resolve(value) result = (v >> 1) & 0xff status.carry = v[0] write_modified(addr, v, result) update_number_flags(result) end |
#ora(_addr, value) ⇒ Object
Performs bitwise OR on accumulator with memory.
Opcodes:
$01 - indirect_x - 6 cycles
$05 - zeropage - 3 cycles
$09 - immediate - 2 cycles
$0D - absolute - 4 cycles
$11 - indirect_y - 5+ cycles
$15 - zeropage_x - 4 cycles
$19 - absolute_y - 4+ cycles
$1D - absolute_x - 4+ cycles
93 94 95 96 |
# File 'lib/badline/instruction_set/bitwise.rb', line 93 def ora(_addr, value) @a |= resolve(value) update_number_flags(@a) end |
#rol(addr, value) ⇒ Object
Rotate left through carry.
Opcodes:
$26 - zeropage - 5 cycles
$2A - accumulator- 2 cycles
$2E - absolute - 6 cycles
$36 - zeropage_x - 6 cycles
$3E - absolute_x - 7 cycles
106 107 108 109 110 111 112 |
# File 'lib/badline/instruction_set/bitwise.rb', line 106 def rol(addr, value) v = resolve(value) result = ((v << 1) + status.carry) & 0xff status.carry = v[7] write_modified(addr, v, result) update_number_flags(result) end |
#ror(addr, value) ⇒ Object
Rotate right through carry.
Opcodes:
$66 - zeropage - 5 cycles
$6A - accumulator- 2 cycles
$6E - absolute - 6 cycles
$76 - zeropage_x - 6 cycles
$7E - absolute_x - 7 cycles
122 123 124 125 126 127 128 |
# File 'lib/badline/instruction_set/bitwise.rb', line 122 def ror(addr, value) v = resolve(value) result = ((v >> 1) + (status.carry? ? 0x80 : 0)) & 0xff status.carry = v[0] write_modified(addr, v, result) update_number_flags(result) end |