Class: MEI8

Inherits:
CPU
  • Object
show all
Defined in:
lib/HDLRuby/hdr_samples/sw_encrypt_cpu_bench.rb

Overview

Simulates an 8-bit data 8-bit address CPU

Instance Attribute Summary

Attributes inherited from CPU

#abus, #ack, #allocator, #clk, #dbus, #req, #rst, #rwb

Instance Method Summary collapse

Methods inherited from CPU

#connect, #controller

Constructor Details

#initialize(clk, rst) ⇒ MEI8

Creates a new CPU simulator.



122
123
124
125
126
127
128
129
130
131
132
# File 'lib/HDLRuby/hdr_samples/sw_encrypt_cpu_bench.rb', line 122

def initialize(clk,rst)
    super(8,8,clk,rst)

    # Instantiate the mei processor.

    mei8(:my_mei8).(self.clk,self.rst,
                    self.req,self.rwb,
                    self.abus,self.dbus,
                    self.ack,
                    0,0)
end

Instance Method Details

#read(code, sig) ⇒ Object

Generates a read of signal +sig+.



138
139
140
141
# File 'lib/HDLRuby/hdr_samples/sw_encrypt_cpu_bench.rb', line 138

def read(code,sig)
    # Generate the resulting SW access.
    return "*(0x#{self.allocator.get(sig).to_s(16)})"
end

#write(val, sig) ⇒ Object

Generates a write of +val+ to signal +sig+.



144
145
146
147
# File 'lib/HDLRuby/hdr_samples/sw_encrypt_cpu_bench.rb', line 144

def write(val,sig)
    # Generate the resulting SW access.
    return "*(0x#{self.allocator.get(sig).to_s(16)}) = #{val};\n"
end